OLED Pictiva 96x64x16

disclaimer / info:

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Pictiva 96x64x16:

description

Osram Pictiva 96x64x16 is a full-colour OLED display with 1" screen diagonal.
specifications
resolution 96x64
colours 256, 64k
controller SSD1332
backlight not needed (OLED -> self emitting)
adjustable contrast yes
dimensions module size: 27.2 x 21.5 mm; display area: 20.1 x 13.4 mm (datasheet)
name in serdisplib "OLED96X64X16"       (example: serdisp_init(sdcd, "OLED96X64X16", ""); )

some images

[pictiva 96x64x16: testserdisp dimension pattern] [pictiva 96x64x16: multidisplay]
output generated by testserdisp some test output rendered by multidisplay
[pictiva 96x64x16: solaris]  
test output generated by multidisplay on a solaris 10 box  

remark

display content looks much better in reality. it is not easy to photograph an OLED because of its high contrast. thus the images shown here are far away from the real impression.
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configuration notes

configuration notes for graphlcd

the default colour in graphlcd is set to black. current versions of graphlcd only draw information (when background and foreground colour are set to default) when using the foreground colour.
when using OLEDs (and depth > 1) the problem now is that information is only visible if the drawing colour is NOT black (because the background of the whole display is black). because of this the foreground colour has to be set to something else (usually white (0xFFFFFF)).
example configuration in graphlcd
 [serdisp]
 Driver=serdisp
 Device=/dev/parport0
 Controller=OLED96X64X16
 FGColour=0xFFFFFF
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connecting a Pictiva 96x64x16 OLED display to the parallel port:

pinout

   1     (nc)   not connected
   2     VCC    OLED power supply
   3     VCOMH  common (row) high voltage
   4     VSS    GND
   5     D7     parallel data 7 / serial mode: nc
   6     D6     parallel data 6 / serial mode: nc
   7     D5     parallel data 5 / serial mode: nc
   8     D4     parallel data 4 / serial mode: nc
   9     D3     parallel data 3 / serial mode: nc
  10     D2     parallel data 2 / serial mode: nc
  11     D1     parallel data 1 / serial mode: SDA
  12     D0     parallel data 0 / serial mode: SCLK
  13     /RD    8080 mode: RD strobe / 6800 mode: E clock
  14     /WR    8080 mode: write strobe / 6800 mode: read/write
  15     D/C    HIGH: data / LOW: command
  16     /RES   active low reset
  17     /CS    active low chip select
  18     IREF   segment (column) current reference
  19     BS2    interface selection pin 2 (see table below)
  20     BS1    interface selection pin 1
  21     VDD    logic supply voltage
  22     (nc)   not connected
  23     (nc)   not connected
  24     (nc)   not connected
  25     VSS    GND
  26     (nc)   not connected


       6800 parallel 8080 parallel SPI serial
  ---  ------------- ------------- ----------
  BS1       0             1             0
  BS2       1             1             0
[pictiva 96x64x16: frontalview]

leftmost: pin 1, rightmost: pin 26

wiring

circuit:

[pictiva 96x64x16: circuit for connecting display to parallel port]

connecting a Pictiva 96x64x16 OLED display to the parallel port


part list:


    Part#   Type                Value                  Annotation
    ---------------------------------------------------------------------------------------
    R1-R12  Resistor            1 kOhm       
    R13     Resistor            10 kOhm
    R14     Resistor            920 kOhm               or 1 MOhm
    C1-C2   Capacitor           4.7 uF
    C3      Capacitor           10 uF

    

annotations:

  • according to the datasheet, VCC (OLED power supply) is 11V, but 12V seems to be fine, too
  • VDD (logic power) needs to be 2.4V - 3.5V. thus 3.3V is fine because it can be gained directly from the ATX power supply
  • pin 4 (VSS) can be left unconnected if pin 25 (VSS) is connected to GND
  • the circuit is hard-wired to parallel bus data-transer
  • interface mode: 8080 (BS1 and BS2 wired to VDD)
  • hardware reset is used
  • LCD/D0 (pin 12) must be connected to PARPORT/D0 (pin 2), LCD/D1 (pin 11) must be connected to PARPORT/D1 (pin 3), and so on


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passing options through serdisp_init():

intro

using the third parameter of serdisp_init(), driver specific options and custom wiring can be set.
common information about passing options and customisable wiring can be found in a separate document.
    examples:
    
      serdisp_init(sdcd, "OLED96X64X16", "CONTRAST=5;INVERT=YES");
      serdisp_init(sdcd, "OLED96X64X16", "DEPTH=8;INTERFACE=6800");
    

options

identifiershortremarkdefault
ROTATEROTrotate display (1 == 180 degrees)0
INVERTINVinvert display0
DELAY delay after each write/read operation.
  0 .. no delay
  1 .. one call of gettimeofday()
 >1 .. delay at least x nanoseconds
     
0
CONTRAST set display contrast5
DEPTHCOLS, COLOURScolour depth16
INTERFACEMODEinterface mode (0 .. 8080, 1 .. 6800, 2 .. SPI)0
WIRINGWIREpre-defined or customisable wiring0

ranges, aliases

identifierrangealiases
ROTATE0, 1, 90, 180, 270YES=180, NO=0, TRUE=180, FALSE=0
INVERT0, 1YES=1, NO=0, TRUE=1, FALSE=0
DELAY>= 0NONE=0
CONTRAST[0, 10] 
DEPTH8, 1665536=16,64k=16,256=8
INTERFACE0, 1, 28080=0,6800=1,SPI=2,SERIAL=2

pre-defined wiring definitions

identifiernumeric idprotocoldescription
Original0PAROriginal wiring
OriginalSWRes1PAROriginal wiring w/ software reset
SPI3PARsimple SPI wiring

display signals

identifierdescriptionmandatory
parallel modes (8080, 6800)
D0 - D78 bit wide data bus*
CSchip select input, active low*
DCdata or command*
WRwrite signal, active low*
RDread signal, active low 
RESETreset signal, active low; optional if wired to a hardware reset circuit 
serial mode (SPI)
SDAserial data*
SCLKserial clock*
CSchip select input, active low*
DCdata or command*
RESETreset signal, active low; optional 
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links:

data sheets, technical informations
display datasheet local copy of Pictiva 96x64x14 display datasheet (english) OLED_96X64_Color.pdf
technical reference local copy of SSD1332 controller technical reference (english) Treiber_IC-SSD1332_OLED_96x64_COLOR.pdf
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history:

2008-01-11 added configuration notes
2007-12-23 corrected a bug in the circuit (IREF resistor was wrongly wired to /REF. needs to be wired to GND instead)
2007-08-26 first release
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design by wolfgang astleitner, (C) 1998 - 2008